1. Field of the Invention
The present invention relates to an alignment fixture for implementing RF and DC testing of integrated circuit packages and, more particularly, to a fixture capable of performing multi-GHz testing on large volumes of packages.
2. Desciption of the Prior Art
During the manufacture of integrated circuit devices, it is necessary to test the performance of the packaged device. A typical test fixture comprises a spring-controlled socket, with the packaged device placed in the socket and the spring control used to "lock" the package in the socket during testing. Once the testing is completed, the spring is released and the device removed. Advantageously, the same socket may be used time and again, providing a test fixture that may be used for large volumes of a particular integrated circuit package.
Although the use of a spring-controlled socket test fixture is useful for many packages, as integrated circuit speed increases (for example, 2.5 GHz and above), the parasitic inductance and capacitance associated with the conventional socket test fixture becomes intolerable. That is, the level of the parasitics begins to interfere with the test measurements. A prior art attempt at solving this problem is to use gold lead lines on the test fixture and form the test structure of a high dielectric material. While an improvement over the prior art, the best connections of the test package to this arrangement require soldering the package to the test structure. The soldering requirement thus slows down the testing process and is, in reality, not a solution for high volume testing applications.
Thus, a need remains in the prior art for a test fixture capable of testing devices at speeds of several GHz without exhibiting the high parasitic capacitance and inductance effects of the prior art arrangements.